Introduction

Environment Setup

• Setup the main project directory. To begin, create a main project directory (under your home directory) to contain all VHDL project files.
• Create design libraries. Before you compile any VHDL code, you need a design library to hold the compilation results. This library will be called Work. Go to the main project directory and make a sub-directory called Work.
• Create the setup file. Under the main directory create a text file called .synopsys_vss.setup. (Notice that it starts with a ".".) Include the following three lines of text in this file:

WORK > DEFAULT

DEFAULT: ./Work

TIMEBASE = NS

• Setup the Unix environment. You need to add /project/cmc/bin to the path.
  

• If you are using C shell, add the following line to the .cshrc file

set path = (/project/cmc/bin $path)

• If you are using bash, add the following line to the .bashrc file

     export PATH=/project/cmc/bin:$PATH

• Launch Synopsys environment window. This environment will be used to run all the relevant software. Enter the following command to start the environment window (shell level is case-sensitive):

setSYNOPSYS2004.06

You should then see a new window pop up that lists the main invocation commands.
• Edit VHDL files. Use any Unix text editor that you are familiar with to create and save VHDL files.

Using The Analyzer/Compiler (vhdlan)

• File extension. VHDL files should hold the extension .vhd.
• Source analysis/compilation. Compile source files by entering the command:

vhdlan <filename.vhd>

If there are syntactical errors in the source code, vhdlan will report the line number and attempt to describe the source of the error.

Using The Debugger/Simulator (vhdldbx)

• Starting the debugger. Invoke the vhdldbx debugger by entering the command:

vhdldbx &

• Selecting the architecture to simulate. Once you invoked the debugger, a startup window appears showing available design units. This window allows selecting the library (the default is work) and the top-level design units to simulate. Make sure that the DEFAULT library is selected in the library scrollbox (on the left side of the window). The design scrollbox (on the right side of the window) shows names of compiled design units using the format entityname_architecturename. Select the design architecture that you want to debug. The startup window also allows selecting the resolution limit (the default is nanoseconds.) Clicking Ok will pass your selections and invoke the debugger window.
• Restarting the simulator. To restart the simulator without exiting the environment, select Execute => Restart from the menu bar.
• Understanding the basic debugging environment. The debugger window is divided into three areas.
• Source window. The top portion of the debugging window shows the VHDL source code of the current working region being simulated. (The current region is that part of your design that is active at the moment.) An arrow in the window points to the next VHDL statement to be executed.
• Command window. The bottom portion of the debugging window is a main window where simulator commands may be entered manually. The symbol # designates the simulator prompt. Menu options and buttons at the top parts of the source and feedback (see below) windows provide an alternative way of entering commands to the debugger.
• Feedback window. The central portion shows quick responses to the entered commands and lists the current value of the simulation time.
• Tracing values on signals. The trace command will cause the signal which is to be listed in a wavefiorm window. For example to have the values of input signal x and output signal  y appear in the waveform  window, issue the following commands from the command area of the debugger window:

# trace x

# trace y

• Waveform viewer window. Issuing a trace commands invokes the waveform viewer window. This window displays waveforms, names, and current values for signals that are selected. You can add a new cursor from the buttons shown on the top of this window. Using these cursors you can do a lot of time measurements. For example, moving the cursor will probe signal values, whereas clicking on the signal moves the cursor to the nearest edge. To add all the top-level signals, enter the command (from the command area):

# trace *

• Applying input. You can assign a stimulus to an input using the assign command from the command window. For example to set the value of signal x to value '1' use the following command

# assign '1' x

• Running the simulator. The run command runs the simulator for a specific time period. For example to run the simulator for a period of 2 ns, issue the command

# run 2

Alternatively, you can type 2 in the small text box beside the run button, then press this button. After running the simulation, waveforms from the selected signals will be updated in the waveform viewer. To see the complete waveform, select View => Full Fit from the waveform menu bar.
• Executing command files. Command files are simple ASCII files used to hold simulation commands (entered from the main simulator command window.) Instead of retyping these commands overtime you want to run the model under simulation, you can store these commands in a file and have the simulator read and execute these commands from the command file. Here is a sample command file (named sim_entity_1):

comm comm_entity_1

trace /entity_1/x

trace /entity_1/y

assign '1' /entity_1/x

run 2

assign '0' /entity_1/x

run 3

assign '1' /entity_1/x

run 1

end comm

• To execute the command file, from the command window, enter the following lines:

# include sim_entity_1

# comm_entity_1

Notice that signals should be referenced in command files qualified by the corresponding entity name.
• Saving the simulation waves. To save the simulation results to a postscript file, select File => print from the from the waveform menu bar. From the dialogue box, select the file choice circle.
• Quitting the simulator. Quit the simulator by entering the command:

# quit

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